EDN

Decreasing the Cost of Test with Automatic Test Pattern Generation

Success in the electronics business hinges on producing high-quality products and using the most cost-effective methods to do so. As the number of devices on integrated circuits continues to double ...
EDN

Automatic test pattern generation with on-chip compression improves test quality

San Jose, Calif. — Magma Design Automation Inc. has launched the Talus automatic test pattern generation (ATPG) and Talus ATPG-X products with on-chip compression. These advanced ATPG products are ...
Electronic Design

Design for Test: ATPG keeps pace with design complexity

Automatic test-pattern generation (ATPG) has played a key role in semiconductor logic test, but several trends driving the need for semiconductor test quality are challenging traditional ATPG tools.
Electronic Design

ATPG Tool Delivers Design-For-Test Solution

In its latest version, FastScan 2001 automatic test pattern generation (ATPG) tool reportedly can reduce test pattern sizes by as much as 60%. It can also test small embedded memories and other macros ...
Semiconductor Engineering

Improve Logic Test With A Hybrid ATPG/BIST Solution

Two test strategies are used to test virtually all IC logic—automatic test pattern generation (ATPG) with test pattern compression, and logic built-in self-test (BIST). For many years, there was a ...
Semiconductor Engineering

Rethinking Test

The responsibility of semiconductor test has long sat solely with the test engineer as the chip designer focused on the functionality of the device. However, particularly in low-power designs, when ...